Computer memory devices have increasingly dense architecture, as advances in technology allow for smaller and smaller components within each device. Each memory device thus has become more complicated for testing. Memory devices may include SPDRAM (serial port dynamic random access memory).
Computer devices may in some cases include built-in self test (BIST) circuitry. The BIST circuitry may assist in the performance of certain tests for memory devices.
However, memory devices may require multiple different types of testing, which may have different requirements. The addition of too much hardware to support testing increases the size and cost of memory boards, and increases the complexity of testing.
Further, testing may involve the testing of multiple memory devices in relation interfacing with differing host systems, and thus testing that is overly complicated or inflexible will increase the cost and complexity of testing of memory devices and interfaces.